Display panel, integrated chip and display apparatus
US12131701B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2023 |
| Grant date | Oct 29, 2024 |
| Priority date | — |
| Expiry date | Jan 30, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present application discloses a display panel, an integrated chip and a display apparatus. The display panel includes: a first display area and a second display area; and pixel circuits including first pixel circuits and second pixel circuits, wherein the first pixel circuits are configured to provide driving currents to light emitting elements of the first display area, and the second pixel circuits are configured to provide driving currents to light emitting elements of the second display area, the pixel circuits receive a bias adjustment signal, the bias adjustment signal includes a first bias adjustment signal and a second bias adjustment signal, the first pixel circuits receive the first bias adjustment signal, and the second pixel circuits receive the second bias adjustment signals, a voltage value of the first bias adjustment signal is V1, and a voltage value of the second bias adjustment signal is V2, wherein V1≠V2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.