Parameter design method for series passive impedance adapter applicable to voltage source converter based high voltage direct current (VSC-HVDC) transmission system
US12132315B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 6, 2021 |
| Grant date | Oct 29, 2024 |
| Priority date | — |
| Expiry date | Jun 6, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E60/60
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a parameter design method for a series passive impedance adapter applicable to a VSC-HVDC transmission system, to resolve the technical problem that high-frequency resonance may occur when impedance of a VSC-HVDC transmission system is mismatched with that of a sending-end or receiving-end grid. A parameter design goal of the present disclosure is that reactive power consumed by a series passive impedance adapter is not more than A times rated power of a converter, and a loss of the series passive impedance adapter in a fundamental wave is B times the rated power of the converter. The parameter design method for a series passive impedance adapter applicable to a VSC-HVDC transmission system in the present disclosure can realize a positive impedance characteristic within a concerned frequency band and completely eliminate a risk of harmonic resonance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.