Block processing method, node, and medium
US12132568B2 · kind B2 · utility
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Key dates
| Filing date | Jul 13, 2021 |
| Grant date | Oct 29, 2024 |
| Priority date | — |
| Expiry date | Jul 18, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4908
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A block processing method, node and medium are provided. The method includes: determining, in a metro transport network, Ethernet or flexible Ethernet, 64B/66B blocks of a forward error correction (FEC) codeword with errors that cannot been corrected; replacing all of the 64B/66B blocks in the FEC codeword with error control blocks, or replacing each invalid 64B/66B block in the FEC codeword with an error control block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.