Pulse edge detection circuit
US12135345B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2022 |
| Grant date | Nov 5, 2024 |
| Priority date | — |
| Expiry date | Feb 14, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1534
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In a pulse edge detection circuit, a measurement circuit has a comparator provided therein which compares a voltage with a reference voltage and outputs a pulse signal. An RSFF puts a signal in a high level at a timing at which detecting a rise edge due to a change of the pulse signal to the high level. In such manner, a set signal of an RSFF becomes inactive and a reset signal of the RSFF becomes active, and a fall edge of the pulse signal becomes detectable. When a fall edge is generated due to a change of the pulse signal from the high level to the low level, the set signal of the RSFF becomes active, and a signal becomes high level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.