Patent · US Active

System on chip including a reconfigurable connection interface between master devices and slave devices

US12135679B2 · kind B2 · utility

0Cited by
0References
20Claims
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Assignee

Inventors

Key dates

Filing dateJun 8, 2022
Grant dateNov 5, 2024
Priority date
Expiry dateJul 23, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F15/7807
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In an embodiment a system on chip includes at least one master device, at least one slave device, a connection interface configured to route signals between the at least one master device and the at least one slave device, the connection interface configured to operate according to configuration parameters, and a configuration bus connected to the connection interface, wherein the configuration bus is configured to deliver new configuration parameters to the connection interface so as to adapt operation of the connection interface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.