Electronic package with interposer between integrated circuit dies
US12136615B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2021 |
| Grant date | Nov 5, 2024 |
| Priority date | — |
| Expiry date | Dec 14, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/83801
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The disclosure is directed to an electronic package with an interposer between integrated circuit dies. At least one inner capacitor (e.g., single layer capacitor) is mounted to the interposer. The electronic package further includes an input passive circuit substrate and an output passive circuit substrate mechanically coupled to the metal base. Use of an interposer to be simultaneously solder attached with integrated circuit dies provides a configuration that improves linearity performance and/or wide video bandwidth of the electronic package (e.g., packages that use epoxy and laminate interposers). Further, such configuration facilitates efficient manufacturing of the electronic package at high volumes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.