Reducing qubit frequency collisions through lattice design
US12137619B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2021 |
| Grant date | Nov 5, 2024 |
| Priority date | — |
| Expiry date | Jan 11, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N60/805
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Lattice arrangements for quantum qubits are described. A lattice arrangement can comprise adjacent structures having vertices connected by edges. The qubits can be positioned on the vertices. A qubit in the lattice arrangement directly connects to not more than three other qubits, or connects to another qubit via a coupling qubit on an edge between two qubits on a vertex. The adjacent structures can comprise hexagons, dodecagons or octagons. A superconducting qubit lattice can comprise superconducting target qubits and superconducting control qubits. The superconducting qubit lattice can comprise adjacent structures having vertices connected by edges, with target qubits positioned on the vertices and control qubits positioned on the edges. Logic operations between adjacent superconducting target and control qubits can be implemented by driving the superconducting control qubit at or near the frequency of the superconducting target qubit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.