Automated circuit generation
US12141511B2 · kind B2 · utility
0Cited by
44References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 8, 2023 |
| Grant date | Nov 12, 2024 |
| Priority date | — |
| Expiry date | May 8, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the present disclosure include techniques for generating a capacitor comprising receiving a total capacitance for a capacitor to be generated, determining a number N of unit capacitors having a unit capacitance to be combined to form the total capacitance, generating a transistor level schematic comprising N unit capacitor schematics having the unit capacitance, wherein the N unit capacitor schematics are configured to produce the total capacitance, and generating a layout comprising N capacitor layout elements configured to produce said capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.