Distributed geometry processing and tracking closed pages
US12141892B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2022 |
| Grant date | Nov 12, 2024 |
| Priority date | — |
| Expiry date | Oct 13, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are disclosed relating to handling memory pages for geometry processing in graphics processors. In some embodiments, a set of geometry work includes multiple segments that generate primitive data. The graphics processor may use distributed control circuitry to assign memory pages, from a page pool for a memory, for primitive data from the geometry work and may close memory pages completed by the geometry work. The distributed control circuitry may generate a list of closed pages for a given segment of the set of geometry work. Primary control circuitry may combine multiple lists of closed pages, from the distributed control circuitry, to generate a consolidated list of closed pages for the set of geometry work. This may reduce memory footprint and facilitate traversal of the combined list, in some embodiments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.