Display panels and display devices
US12142201B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2023 |
| Grant date | Nov 12, 2024 |
| Priority date | — |
| Expiry date | Nov 29, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display including a pixel circuit is provided. The pixel circuit includes a driving transistor, a writing transistor connected in series between a data line and the second node or the third node, an initialization module, and a compensation transistor connected in series between the first node and the second node or the third node. In the driving transistor, a gate is connected to the first node, a first electrode is connected to the second node, and a second electrode is connected to the third node. A gate of the writing transistor is connected to a scanning signal. The initialization module is connected to the first, second, and/or third nodes to perform resetting. The compensation transistor remains a turned-on state in only one continuous time period in each frame, and the initialization module and the writing transistor turn on in a time-sharing manner in the continuous time period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.