Semiconductor storage device including a voltage difference generation circuit
US12142321B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 10, 2022 |
| Grant date | Nov 12, 2024 |
| Priority date | — |
| Expiry date | Jan 13, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor storage device includes a connection transistor that connects a first wiring to a word line, a block decoder that supplies a signal to a gate of the connection transistor, and a voltage generation circuit including a first node from which a first voltage for generating the signal is supplied to the block decoder, a second node from which a second voltage is supplied to the first wiring, and a voltage difference generation circuit connected between the first node and the second node, wherein the voltage difference generation circuit includes diode-connected first and second transistors and a third transistor, each of the diode-connected first and second transistors having a current path connected between the first and second nodes, the third transistor having a first terminal connected to the first node, a gate connected to a gate of the second transistor, and a second terminal connected to the second node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.