Highly optimized network-on-chip design at large scale
US12143302B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2021 |
| Grant date | Nov 12, 2024 |
| Priority date | — |
| Expiry date | Apr 10, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/822
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
There may be provided a method for traffic control in a network on chip (NOC), the method may include receiving, by input interface units of the NOC, flow control units destined to output interface units of the NOC; wherein multiple routing paths span between the input interface units and the output interface units; wherein at least some of the routing paths are formed by multiple routers of a grid of routers of the NOC and have a single turning point; allocating virtual channels to the flow control units, wherein an allocating of a virtual channel to a flow control unit (FCU) is based on a type of a transaction associated with the FCU and on a location of the single turning point; and routing the flow control units, based on the virtual channels allocated to the FCUs, between the input interface units and the output interface units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.