Semiconductor device including select cutting structure, method for manufacturing the same and electronic system including the same
US12144171B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2021 |
| Grant date | Nov 12, 2024 |
| Priority date | — |
| Expiry date | Jan 19, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device of the disclosure includes a peripheral circuit structure including a peripheral transistor, a semiconductor layer on the peripheral circuit structure, a source structure on the semiconductor layer, a gate stack structure on the source structure, the gate stack structure including a word line, a gate upper line and a staircase structure, a memory channel structure and a dummy channel structure extending through the gate stack structure, a cut structure extending through the gate upper line, and a bit line overlapping with the memory channel structure. The cut structure includes a narrow section, and a wide section nearer to the staircase structure than the narrow section. A width of the narrow section is less than a width of the wide section.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.