Array substrate and display panel
US12147137B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 16, 2023 |
| Grant date | Nov 19, 2024 |
| Priority date | — |
| Expiry date | Oct 16, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/1368
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate includes a base substrate, pixel electrodes and common electrodes, first scan lines, second scan lines and data lines. The pixel electrode has first electrode strips disposed at intervals in a row direction. The common electrodes and the pixel electrodes are disposed on the same layer, and the common electrodes have second electrode strips disposed at intervals. The second electrode strips and the first electrode strips are alternatively arranged. The first scan line is located between two adjacent rows of pixel electrodes. The second scan line is located between two adjacent columns of pixel electrodes and is electrically connected to the first scan line, and the second scan line has a scan signal input terminal. The data line has a data signal input terminal. An orthographic projection of the data line on the base substrate intersects with a central region of the pixel electrode on the base substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.