Integrated circuit and method of designing the same
US12147751B2 · kind B2 · utility
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6References
19Claims
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Key dates
| Filing date | Jun 28, 2021 |
| Grant date | Nov 19, 2024 |
| Priority date | — |
| Expiry date | Jun 12, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/981
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a plurality of logic cells arranged in a first row extending in a first direction and including different types of active areas extending in the first direction, a filler cell arranged in a second row adjacent to the first row in a second direction orthogonal to the first direction and extending in the first direction, and a first routing wiring line arranged in the second row and connecting a first logic cell and a second logic cell apart from each other by a first distance among the plurality of logic cells. A height of the first row is different from a height of the second row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.