Patent · US Active

Neural network computing device and cache management method thereof

US12147890B2 · kind B2 · utility

0Cited by
1References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 11, 2020
Grant dateNov 19, 2024
Priority date
Expiry dateMar 14, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/60
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A neural network computing device and a cache management method thereof are provided. The neural network computing device includes a computing circuit, a cache circuit and a main memory. The computing circuit performs a neural network calculation including a first layer calculation and a second layer calculation. After the computing circuit completes the first layer calculation and generates a first calculation result required for the second layer calculation, the cache circuit retains the first calculation result in the cache circuit until the second layer calculation is completed. After the second layer calculation is completed, the cache circuit invalidates the first calculation result retained in the cache circuit to prevent the first calculation result from being written into the main memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.