Manufacturing method for semiconductor structure, and semiconductor structure
US12148619B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2021 |
| Grant date | Nov 19, 2024 |
| Priority date | — |
| Expiry date | Oct 16, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method for a semiconductor structure includes: a substrate is provided, the substrate including a first region and a second region; a dielectric layer is formed on the substrate; a first diffusion film layer having a first metal oxide layer is formed on the dielectric layer; the first diffusion film layer corresponding to the second region is removed; a second diffusion film layer is formed on the dielectric layer corresponding to the second region, the second diffusion film layer including a second metal oxide layer interfacing with the dielectric layer; and an annealing treatment is performed to diffuse a first metal element in the first metal oxide layer into the dielectric layer corresponding to the first region and diffuse a second metal element in the second metal oxide layer into the dielectric layer corresponding to the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.