Semiconductor structure and method for forming the same
US12148657B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2023 |
| Grant date | Nov 19, 2024 |
| Priority date | — |
| Expiry date | Mar 27, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53295
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor interconnect structure includes a conductive line electrically coupled to an active semiconductor device, a first etch stop layer formed over the conductive line, a first dielectric layer formed over the first etch stop layer, a second etch stop layer formed over the first dielectric layer, a second dielectric layer formed over the second etch stop layer, and an interconnect structure electrically coupled to the via and extending through the first etch stop layer, the first dielectric layer, the second etch stop layer, and the second dielectric layer. The interconnect structure includes a via extending through the first etch stop layer, the second etch stop layer, and the first dielectric layer and a trench extending through the second dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.