Solid-state imaging device with transistor drain connected to sense node of logarithmic conversion circuit
US12149839B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2021 |
| Grant date | Nov 19, 2024 |
| Priority date | — |
| Expiry date | Jul 5, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/60
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Suppressing a dead period at the time of mode switching. A solid-state imaging device includes: a plurality of pixels (300) that each outputs a luminance change of incident light; and a detection circuit (305) that outputs an event signal based on the luminance change output from each of the pixels, in which each of the pixels includes: a photoelectric conversion element (311) that generates a charge according to an incident light amount; a logarithmic conversion circuit (312, 313) that is connected to the photoelectric conversion element and converts a photocurrent flowing out of the photoelectric conversion element into a voltage signal corresponding to a logarithmic value of the photocurrent; and a first transistor (318) having a drain connected to a sense node of the logarithmic conversion circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.