GPU-optimized append operation with latch-free write combining on shared memory
US12153539B1 · kind B1 · utility
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Key dates
| Filing date | May 23, 2023 |
| Grant date | Nov 26, 2024 |
| Priority date | — |
| Expiry date | May 23, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An append operation is provided for using a plurality of threads on a plurality of streaming multiprocessors of a graphical processing unit. The append operation writes results into a result buffer. Executing the append operation comprises claiming, by each given thread within the plurality of threads having a result to write, a portion of a selected WCB, writing, by the given thread, the result to the portion of the selected WCB, and in response to a flush condition being met for the selected WCB, copying contents of the selected WCB to a result buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.