Methods and apparatus for issuing memory access commands
US12153805B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2020 |
| Grant date | Nov 26, 2024 |
| Priority date | — |
| Expiry date | Sep 1, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Examples of the present disclosure relate to an apparatus comprising interface circuitry to receive memory access commands directed to a memory device, each memory access command specifying a memory address to be accessed. The apparatus comprises scheduler circuitry to store a representation of a plurality of states accessible to the memory device and, based on the representation, determine an order for the received memory access commands. The apparatus comprises dispatch circuitry to receive the received memory access commands from the scheduler circuitry and issue the received memory access commands, in the determined order, to be performed by the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.