Display substrate including multiple cascaded shift register units, preparation method thereof, and display device
US12154510B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 26, 2021 |
| Grant date | Nov 26, 2024 |
| Priority date | — |
| Expiry date | Apr 23, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/184
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A display substrate includes an underlay substrate, and a first semiconductor layer, first conductive layer, second semiconductor layer, second conductive layer, and third conductive layer which are arranged on the underlay substrate. The first semiconductor layer includes an active layer of at least one transistor of a second semiconductor type of a shift register unit. The first conductive layer includes a control electrode of the at least one transistor of the second semiconductor type and a first electrode of at least one capacitor of the shift register unit. The second semiconductor layer includes an active layer of at least one transistor of a first semiconductor type of the shift register unit. The second conductive layer includes a control electrode of the at least one transistor of the first semiconductor type and a second electrode of the at least one capacitor of the shift register unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.