Methods of performing selective low resistivity Ru atomic layer deposition and interconnect formed using the same
US12154787B2 · kind B2 · utility
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12Claims
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Key dates
| Filing date | Dec 8, 2021 |
| Grant date | Nov 26, 2024 |
| Priority date | — |
| Expiry date | Jun 17, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53242
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Provided by the inventive concept are methods for fabricating semiconductor devices, such as methods of atomic layer deposition (ALD). Aspects of the inventive concept include methods for depositing and forming Ru metal layers having low resistivity, forming Ru metal layers without the need for a post-deposition annealing step, forming Ru metal layers selectively on portions of a substrate without the need for passivation, and providing Ru metal layers for use in back end of the line (BEOL) applications in semiconductor devices that do not require a liner/barrier layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.