Optoelectronic semiconductor chip
US12155023B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2020 |
| Grant date | Nov 26, 2024 |
| Priority date | — |
| Expiry date | Jun 23, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/833
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to an optoelectronic semiconductor chip comprising a semiconductor layer sequence with a first semiconductor layer, a second semiconductor layer and an active layer between the first and the second semiconductor layers. The optoelectronic semiconductor chip further comprises a first contact structure with a plurality of first contact pins and a first contact layer for electrically contacting the first semiconductor layer and a second contact structure for electrically contacting the second semiconductor layer. The first semiconductor layer is disposed between the first contact layer and the active layer. The first contact pins are disposed between the first contact layer and the first semiconductor layer and are separated and spaced at a distance from one another in the lateral direction. An electrical connection with an electrical resistance between the first contact layer and the first semiconductor layer is formed by each first contact pin. The first contact pins are selected such that they have different electrical resistances as a result of electrical connections formed by two different first contact pins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.