Electronic device managing corrected error and operating method of electronic device
US12158809B2 · kind B2 · utility
0Cited by
10References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 4, 2023 |
| Grant date | Dec 3, 2024 |
| Priority date | — |
| Expiry date | Apr 4, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is an electronic device including a memory module that includes at least one dynamic random access memory, and a processor configured to access the memory module, determine a corrected error count associated with an address of a corrected error in response to the corrected error being detected when data are read from the memory module, read an error log associated with the corrected error, determine a risk level of the corrected error based on the error log, and schedule a post package repair (PPR) for the address of the corrected error in response to the risk level of the corrected error being high.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.