Semiconductor device having a layer stack, semiconductor arrangement and method for producing the same
US12159854B2 · kind B2 · utility
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13Claims
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Key dates
| Filing date | Dec 27, 2023 |
| Grant date | Dec 3, 2024 |
| Priority date | — |
| Expiry date | Dec 27, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/37001
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor wafer or a single semiconductor chip or die, and a layer stack. The layer stack comprises a first layer comprising NiSi, and a second layer comprising NiV, wherein the second layer is arranged between the first layer and the semiconductor wafer or single semiconductor chip or die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.