Semiconductor package
US12159857B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 26, 2021 |
| Grant date | Dec 3, 2024 |
| Priority date | — |
| Expiry date | Dec 28, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a substrate that includes a bonding pad, a first semiconductor chip disposed on the substrate, a second semiconductor chip disposed on a top surface of the first semiconductor chip that is opposite to the substrate, a chip pad disposed on the top surface of the first semiconductor chip, and a bonding wire that connects the chip pad to the bonding pad. The bonding wire includes a first upward protrusion and a second upward protrusion that are convexly curved in a direction away from the substrate. The second semiconductor chip has a first side surface between the first upward protrusion and the second upward protrusion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.