Multilayer structure and semiconductor device
US12159940B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2022 |
| Grant date | Dec 3, 2024 |
| Priority date | — |
| Expiry date | Mar 23, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are a multilayer structure in which crystal defects due to stress concentration in a semiconductor layer caused by an insulator film are prevented and a semiconductor device using the multilayer structure, the multilayer structure and the semiconductor device that are particularly useful for power devices. A multilayer structure in which an insulator film is arranged on a part of a semiconductor film, wherein the semiconductor film has a corundum structure and contains a crystalline oxide semiconductor containing one or two or more metals selected from groups 9 and 13 of the periodic table, and wherein the insulator film has a taper angle of 20° or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.