Offloading data processing and knowledge synthesis
US12164920B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 9, 2022 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | Jun 13, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/466
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure describes techniques for offloading data processing and knowledge synthesis. A set of flags may indicate information about the memory pages in a first memory and may be manageable by at least one central processing unit (CPU). A memory page may be flushed to a second memory if the memory page is associated with a first flag. The first flag may indicate that the memory page is ready to be flushed to the second memory. The second memory may be configured to store a sequence of states of each of the memory pages. Data patterns and relations among the data patterns may be determined by data processing units (DPUs) based on the sequence of states of each of the memory pages. A knowledge base may be built in a third memory based on the data patterns and the relations among the data patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.