Patent · US Active

Thread weave for cross-instruction set architecture procedure calls

US12164978B2 · kind B2 · utility

0Cited by
134References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 10, 2019
Grant dateDec 10, 2024
Priority date
Expiry dateJan 21, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/4406
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The invention provides a method of initiating code including (i) storing an application having first, second and third functions, the first function being a main function that calls the second and third functions to run the application, (ii) compiling the application to first and second heterogeneous processors to create first and second central processing unit (CPU) instruction set architecture (ISA) objects respectively, (iii) pruning the first and second CPU ISA objects by removing the third function from the first CPU ISA objects and removing first and second functions from the second CPU ISA objects, (iv) proxy inserting first and second remote procedure calls (RPC's) in the first and second CPU ISA objects respectively, and pointing respectively to the third function in the second CPU ISA objects and the second function in the first CPU ISA objects, and (v) section renaming the second CPU ISA objects to common application library.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.