Downscaler and method of downscaling
US12165278B2 · kind B2 · utility
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11References
18Claims
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Key dates
| Filing date | Sep 20, 2021 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | Sep 23, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2017/0245
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A hardware downscaling module and downscaling methods for downscaling a two-dimensional array of values. The hardware downscaling unit comprises a first group of one-dimensional downscalers; and a second group of one-dimensional downscalers; wherein the first group of one-dimensional downscalers is arranged to receive a two-dimensional array of values and to perform downscaling in series in a first dimension; and wherein the second group of one-dimensional downscalers is arranged to receive an output from the first group of one-dimensional downscalers and to perform downscaling in series in a second dimension.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.