Gate driver including pull-up circuit and pull-down circuit and display apparatus including the same
US12165553B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2023 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | Jan 10, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0247
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver includes: a pull-up circuit configured to pull up a gate output signal to a high voltage in response to a signal at a first node of the pull-up circuit; a first pull-down circuit configured to pull down the gate output signal to a low voltage in response to a signal at a second node of the first pull-down circuit; a second pull-down circuit configured to pull down the gate output signal to the low voltage in response to a signal at a third node of the second pull-down circuit; a first selection circuit configured to activate the first pull-down circuit and deactivate the second pull-down circuit based on a first selection signal; and a second selection circuit configured to activate the second pull-down circuit and deactivate the first pull-down circuit based on a second selection signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.