Semiconductor device in a containment structure including a buried layer
US12165868B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2023 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | May 31, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/378
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a semiconductor manufacturing method, a mask is disposed on a semiconductor layer or semiconductor substrate. The semiconductor layer or semiconductor substrate is etched in an area delineated by the mask to form a cavity. With the mask disposed on the semiconductor layer or semiconductor substrate, the cavity is lined to form a containment structure. With the mask disposed on the semiconductor layer or semiconductor substrate, the containment structure is filled with a base semiconductor material. After filling the containment structure with the base semiconductor material, the mask is removed. At least one semiconductor device is fabricated in and/or on the base semiconductor material deposited in the containment structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.