Efficient switching circuit
US12166475B2 · kind B2 · utility
0Cited by
34References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 2023 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | May 12, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0054
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a first leg having a plurality of transistors connected in series between a first node and a second node. Each of the plurality of transistors includes a respective body diode. The apparatus further includes a second leg connected between the first node and the second node and in parallel to the series connection of the plurality of transistors of the first leg. The second leg includes a first transistor. The second leg has lower reverse recovery losses relative to the first leg.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.