Loop bandwidth control for fractional-n frequency synthesizer
US12166493B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 27, 2023 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | Mar 27, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/093
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an example, a system includes a phase-locked loop including a charge pump coupled to a phase frequency detector, a low-pass filter coupled to the charge pump, and a VCO coupled to the low-pass filter, where the charge pump is configured to provide a charge pump current to the low-pass filter. The system also includes a current source configured to provide a bias current to the charge pump. The system includes a first bias compensation circuit configured to increase the bias current responsive to a control voltage provided to the VCO being within a first range. The system also includes a second bias compensation circuit configured to decrease the bias current responsive to the control voltage provided to the VCO being within a second range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.