Array structure of capacitors, method for manufacturing array structure of capacitors, and dynamic random access memory
US12167585B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2022 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | Dec 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/315
Abstract
An array structure of capacitors are provided. The array structure of capacitors includes a substrate and a first connection pad, a second connection pad, a first capacitive structure and a second capacitive structure that are disposed on the substrate. The first capacitive structure is disposed outside the second capacitive structure and adjacent to an edge of the substrate. The bottom surface of the first capacitive structure towards the substrate and the top surface of the first connection pad are disposed at intervals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.