Error correction for programmable photonics
US12175335B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2021 |
| Grant date | Dec 24, 2024 |
| Priority date | — |
| Expiry date | Oct 25, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Programmable photonic circuits of reconfigurable interferometers can be used to implement arbitrary operations on optical modes, providing a flexible platform for accelerating tasks in quantum simulation, signal processing, and artificial intelligence. A major obstacle to scaling up these systems is static fabrication error, where small component errors within each device accrue to produce significant errors within the circuit computation. Mitigating errors usually involves numerical optimization dependent on real-time feedback from the circuit, which can greatly limit the scalability of the hardware. Here, we present a resource-efficient, deterministic approach to correcting circuit errors by locally correcting hardware errors within individual optical gates. We apply our approach to simulations of large-scale optical neural networks and infinite impulse response filters implemented in programmable photonics, finding that they remain resilient to component error well beyond modern day process tolerances. Our error correction process can be used to scale up programmable photonics within current fabrication processes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.