Method of fabricating an integrated structure for an optoelectronic device and integrated structure for an optoelectronic device
US12176461B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2020 |
| Grant date | Dec 24, 2024 |
| Priority date | — |
| Expiry date | Jul 7, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/813
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated structure for an optoelectronic device and a method of fabricating an integrated structure for an optoelectronic device. The method comprises the steps of forming a plurality of epitaxial layers for optical elements on an epitaxial growth substrate, wherein the epitaxial layers are based on a material system different from complementary metal-oxide-semiconductor, CMOS; providing a handle wafer; performing a first dielectric bonding between the epitaxial growth substrate and the handle wafer such that an order of the epitaxial layers for the optical elements is reversed on the handle wafer compared to on the epitaxial growth substrate; removing the epitaxial growth substrate to expose one of the epitaxial layers on the handle wafer; processing the exposed one of the epitaxial layers for providing a common electrode layer for a first contact of each of the optical elements in the optoelectronic device; providing a CMOS integrated circuit, IC, wafer comprising a driver circuit for the optoelectronic device; and performing a second dielectric bonding between the handle wafer and the IC wafer such that an order of the epitaxial layers for the optical elements is reversed o…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.