Three-way combined RF power amplifier architecture
US12176858B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2021 |
| Grant date | Dec 24, 2024 |
| Priority date | — |
| Expiry date | Apr 3, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methods for amplifying a signal is described. A circuit may convert an input radio frequency (RF) signal into a first RF signal with power level matching a power capacity of a first transistor of a first size in a carrier amplifier stage, a second RF signal with power level matching a power capacity of a second transistor of the first size in a peaking amplifier stage, and a third RF signal with third power level matching a power capacity of a third transistor of a second size in another peaking amplifier stage. The circuit may amplify the first, second, and third RF signals to generate first, second, and third amplified RF signals, respectively. The circuit may combine the first, second, and third amplified RF signals, into an output RF signal that is an amplified version of the input RF signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.