Nano-power architecture enhancements
US12176909B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Oct 20, 2021 |
| Grant date | Dec 24, 2024 |
| Priority date | — |
| Expiry date | Jun 9, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/468
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Apparatuses and methods of capacitance-to-digital code conversion are described. One capacitance-to-digital converter (CDC) includes front-end circuitry, including a comparator. The CDC further includes a first capacitive digital-to-analog converter (CDAC) coupled to a first input of the comparator and, in a first phase, to a sensor cell. The CDC further includes a second CDAC coupled to a second input of the comparator and, in a second phase, to the sensor cell. The front-end circuitry provides a digital output. The digital output is proportional to a sensor capacitance of the sensor cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.