Storage device syndrome-weight-based error correction system
US12176921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2023 |
| Grant date | Dec 24, 2024 |
| Priority date | — |
| Expiry date | Apr 11, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/611
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A storage device syndrome-weight-based error correction system includes a syndrome-weight-based error correction subsystem that is coupled to a storage subsystem in a chassis. The syndrome-weight-based error correction subsystem performs a first error correction hard decoding operation on the storage subsystem that utilizes first read voltage thresholds and that generates a first final codeword candidate having a first syndrome weight. The syndrome-weight-based error correction subsystem then performs error correction hard decoding read voltage threshold real-time search operations to determine second read voltage thresholds, and performs a second error correction hard decoding operation on the storage subsystem that utilizes the second read voltage thresholds and that generates a second final codeword candidate having a second syndrome weight. If the syndrome-weight-based error correction subsystem determines that the first syndrome weight is less than the second syndrome weight, it performs error correction soft decoding operations using the first read voltage thresholds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.