Electronic device and operating method of a decoder
US12177324B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2023 |
| Grant date | Dec 24, 2024 |
| Priority date | — |
| Expiry date | Sep 8, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/43
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Disclosed is an operating method of an encoder, which includes receiving a first bit stream including first to N-th bits, determining at least one symbol in the first bit stream, wherein the at least one symbol includes “M” consecutive bits each having the first bit value or the second bit value, and generating a first data packet including a first header and at least one packet symbol. The first header includes a least symbol address of a first symbol of the at least one symbol and an inverted value of a bit value of the first bit, a first packet symbol of the at least one packet symbol includes a bit value of the first symbol, a least symbol address of a second symbol of the at least one symbol, and an inverted value of a bit value of a next bit of the first symbol.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.