System on chip and electronic device including the same
US12181950B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2022 |
| Grant date | Dec 31, 2024 |
| Priority date | — |
| Expiry date | Sep 13, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system on chip (SoC) includes a first core and a second core, first and second power gating switches, and a first power switch. The first power gating switch is arranged between the first core and a first power rail that receives a first voltage, and is selectively turned on in response to a first power gating signal. The second power gating switch is arranged between the second core and a second power rail that receives a second voltage, and is selectively turned on in response to a second power gating signal. The first power switch is arranged between the first power rail and the second power rail, and is selectively turned on in response to a first power control signal to connect the first power gating switch or the second power gating switch both the first power rail and the second power rail.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.