Small spacecraft processing and bus architecture
US12181985B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2021 |
| Grant date | Dec 31, 2024 |
| Priority date | — |
| Expiry date | Oct 25, 2041 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB64G3/00
- WIPO fieldTransport
- WIPO sectorMechanical engineering
Abstract
A spacecraft computing system, including: a first processor configured to process data from a payload and a first spacecraft system; a second processor configured to process data from a second spacecraft system; an interface connected to the second processor configured to interface with a third spacecraft system, wherein the second processor is configured to monitor the first processor and to initiate the recovery of the first processor when the first processor experiences a fault, wherein the first processor's processing capacity is greater the second processor's processing capacity, and wherein the second processor is more reliable than the first processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.