Memory system and control method based on quad-serial peripheral interface (SPI) controller with external memory system based on SPI standard
US12182399B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2022 |
| Grant date | Dec 31, 2024 |
| Priority date | — |
| Expiry date | Jan 21, 2043 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a nonvolatile memory and a serial peripheral interface (SPI) controller communicable with an external controller external to the memory system in accordance with an SPI standard, a first terminal through which the SPI controller receives a command, and a second terminal. The SPI controller is configured to operate in one of a plurality of operational modes in accordance with the command received through the first terminal. The operational modes include a first mode in which a signal received through the second terminal is used as a control signal to perform a predetermined function and a second mode in which the signal is not used as the control signal to perform the predetermined function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.