Color selection schemes for storage allocation
US12182549B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 7, 2023 |
| Grant date | Dec 31, 2024 |
| Priority date | — |
| Expiry date | Aug 7, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A compiler-implemented technique for performing a storage allocation is described. Computer code to be converted into machine instructions for execution on an integrated circuit device is received. The integrated circuit device includes a memory having a set of memory locations. Based on the computer code, a set of values that are to be stored on the integrated circuit device are determined. An interference graph that includes the set of values and a set of interferences is constructed. While traversing the interference graph, a set of memory location assignments are generated by assigning the set of values to the set of memory locations in accordance with one or more color selection schemes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.