Method for forming semiconductor structure
US12183586B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2021 |
| Grant date | Dec 31, 2024 |
| Priority date | — |
| Expiry date | Mar 30, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment of the application provides a method for forming a semiconductor structure. The semiconductor structure includes a first region and a second region. The method includes the following steps: providing a base, an insulating layer, and a mask layer that are stacked in sequence, where the first region has at least one trench penetrating the mask layer and the insulating layer, and the mask layer has an upper surface in the second region higher than that in the first region; forming a first protection layer, where an upper surface and a sidewall of the mask layer in the first region are covered with the first protection layer; after the first protection layer is formed, removing the mask layer in the second region; subsequent to removal of the mask layer in the second region, removing the first protection layer; and removing the mask layer in the first region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.