Systems and method of compensating for nonlinear capacitance in converters
US12184296B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Sep 22, 2022 |
| Grant date | Dec 31, 2024 |
| Priority date | — |
| Expiry date | Jul 5, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1042
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Described herein are systems and methods related to a converter includes a number of unit cells. The unit cells each include a first transistor and a second transistor. The first transistor is coupled in series with an output of the unit cell, and the second transistor is configured to have a capacitive characteristic that reduces a non-linear capacitive characteristic of the first transistor. The converter can be a voltage or current mode digital to analog converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.