Display panel with overlapping wiring and common electrode layer
US12189248B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2022 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | May 13, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2300/0413
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An embodiment of the present application discloses a display panel including an array substrate including a common wiring. The common wiring includes a first wiring, the first wiring is disposed in a redundancy pixel region. An opposite substrate includes a common electrode layer disposed in a display region and a redundancy pixel region. Along a thickness direction of the display panel, the first wiring overlaps the common electrode layer. When the display panel is in a display state, an absolute value of a difference between a voltage inputted to the first wiring and a voltage inputted to the common electrode layer ranges from 0 to 1 volt.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.