Multi-part device enclosure
US12189439B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2023 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Jan 6, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M1/0249
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic device includes an enclosure formed of a plurality of layers cooperating to define an interior volume. The enclosure includes a first layer formed of a first material and defining a user input surface of the enclosure and a first portion of a side surface of the enclosure. The enclosure also includes a second layer, formed of a second material different from the first material, positioned below the first layer and defining a second portion of the side surface of the enclosure. The enclosure also includes a third layer, formed of a third material different from the first and second materials, positioned below the second layer and defining a bottom surface of the enclosure and a third portion of the side surface of the enclosure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.